summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorAlejandro Colomar <alx.manpages@gmail.com>2021-11-19 19:35:28 +0100
committerAlejandro Colomar <alx.manpages@gmail.com>2021-11-20 17:04:28 +0100
commit01b125783de393512e369e41214f53eabad18786 (patch)
treeee50b6cc37a0b7bb72ea163651d6a05405ceafe2
parent10d8caa490ac80a2e204a7ee1b8b49ec7252ebca (diff)
drivers/gpu/drm/: Don't redefine ARRAY_SIZE()
Signed-off-by: Alejandro Colomar <alx.manpages@gmail.com>
-rw-r--r--drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c5
-rw-r--r--drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c6
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c6
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c6
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c6
5 files changed, 23 insertions, 6 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c
index 9039fb134db5..0fc57b22e855 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c
@@ -23,6 +23,8 @@
*
*/
+
+#include <linux/array_size.h>
#include <linux/delay.h>
#include "dm_services.h"
@@ -30,7 +32,8 @@
#include "timing_generator.h"
#include "hw_sequencer.h"
-#define NUM_ELEMENTS(a) (sizeof(a) / sizeof((a)[0]))
+
+#define NUM_ELEMENTS(a) ARRAY_SIZE(a)
/* used as index in array of black_color_format */
enum black_color_format {
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
index 2c7eb982eabc..45b3596baeb6 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
@@ -23,11 +23,12 @@
*
*/
+
+#include <linux/array_size.h>
#include <linux/slab.h>
#include "dm_services.h"
-
#include "dc_types.h"
#include "core_types.h"
@@ -39,6 +40,7 @@
#include "reg_helper.h"
+
#define REG(reg)\
(clk_src->regs->reg)
@@ -55,7 +57,7 @@
#define CALC_PLL_CLK_SRC_ERR_TOLERANCE 1
#define MAX_PLL_CALC_ERROR 0xFFFFFFFF
-#define NUM_ELEMENTS(a) (sizeof(a) / sizeof((a)[0]))
+#define NUM_ELEMENTS(a) ARRAY_SIZE(a)
static const struct spread_spectrum_data *get_ss_data_entry(
struct dce110_clk_src *clk_src,
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c
index 904c2d278998..e51eafd0cd56 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c
@@ -23,6 +23,9 @@
*
*/
+
+#include <linux/array_size.h>
+
#include "dm_services.h"
#include "core_types.h"
@@ -32,6 +35,7 @@
#include "basics/conversion.h"
#include "dcn10_cm_common.h"
+
#define NUM_PHASES 64
#define HORZ_MAX_TAPS 8
#define VERT_MAX_TAPS 8
@@ -49,7 +53,7 @@
#define FN(reg_name, field_name) \
dpp->tf_shift->field_name, dpp->tf_mask->field_name
-#define NUM_ELEMENTS(a) (sizeof(a) / sizeof((a)[0]))
+#define NUM_ELEMENTS(a) ARRAY_SIZE(a)
enum dcn10_coef_filter_type_sel {
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c
index 947eb0df3f12..011d0da1de35 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c
@@ -23,13 +23,17 @@
*
*/
+
#include "dcn20_mpc.h"
+#include <linux/array_size.h>
+
#include "reg_helper.h"
#include "dc.h"
#include "mem_input.h"
#include "dcn10/dcn10_cm_common.h"
+
#define REG(reg)\
mpc20->mpc_regs->reg
@@ -43,7 +47,7 @@
#define FN(reg_name, field_name) \
mpc20->mpc_shift->field_name, mpc20->mpc_mask->field_name
-#define NUM_ELEMENTS(a) (sizeof(a) / sizeof((a)[0]))
+#define NUM_ELEMENTS(a) ARRAY_SIZE(a)
void mpc2_update_blending(
struct mpc *mpc,
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c
index 95149734378b..00737b7fb6c0 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c
@@ -23,6 +23,9 @@
*
*/
+
+#include <linux/array_size.h>
+
#include "reg_helper.h"
#include "dcn30_mpc.h"
#include "dcn30_cm_common.h"
@@ -30,6 +33,7 @@
#include "dcn10/dcn10_cm_common.h"
#include "dc.h"
+
#define REG(reg)\
mpc30->mpc_regs->reg
@@ -41,7 +45,7 @@
mpc30->mpc_shift->field_name, mpc30->mpc_mask->field_name
-#define NUM_ELEMENTS(a) (sizeof(a) / sizeof((a)[0]))
+#define NUM_ELEMENTS(a) ARRAY_SIZE(a)
static bool mpc3_is_dwb_idle(